Loading source-backed pinouts…
Microcontroller · Development Board
TI LP-MSPM0G3507
A modern low-cost TI LaunchPad for MSPM0 development with onboard debugger and BoosterPack expansion.
Processor
TI MSPM0G3507 Arm Cortex-M0+
Logic
3.3 V GPIO
Power
USB, BoosterPack headers
Format
LaunchPad with BoosterPack headers
Check before wiring
- 3.3 V IO; check BoosterPack voltage assumptions.
- PA18 is shared with the bootloader button, and J14/J15 select which signals reach two BoosterPack positions.
- Some pins are routed through jumpers or onboard peripherals.
- Use the TI user's guide for exact header-to-MCU mapping.
Interfaces
GPIOI2CSPIUARTADCDACPWMCANUSBSWD
Source-backed connector
Interactive pin map
Pin map
Connector
40-pin BoosterPack headers J1-J4
Signals grouped by function — schematic layout, not to physical scale
Dense header — open Full view for a roomier, fully-labelled diagram.
Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.
Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.
- MSPM0G3507 I/O operates from the 3.3 V target rail and is not 5 V tolerant.
- J14 and J15 select which MCU signals reach BoosterPack positions 3 and 29.
- Buttons, LEDs, thermistor, op-amp, and debugger UART/SWD signals remain connected unless their isolation jumpers are removed.
All 40 pins (table)
| # | Signal | Role | Net | Also / notes |
|---|---|---|---|---|
| BoosterPack positions 1-20 | ||||
| 1 | Power | 3V3 | ||
| 2 | ADC | ADC0.2 | ||
| 3 | UART | UART | UART RX / J14 select | |
| 4 | UART | UART | UART TX | |
| 5 | GPIO | |||
| 6 | ADC | ADC0.5 | ||
| 7 | SPI | SPI | SPI CLK | |
| 8 | GPIO | |||
| 9 | I2C | I2C | I2C SCL | |
| 10 | I2C | I2C | I2C SDA | |
| 11 | GPIO | |||
| 12 | SPI | SPI | SPI CS | |
| 13 | SPI | SPI | SPI CS | |
| 14 | SPI | SPI | SPI POCI | |
| 15 | SPI | SPI | SPI PICO | |
| 16 | System | |||
| 17 | GPIO | |||
| 18 | SPI | SPI | SPI CS | |
| 19 | PWM | |||
| 20 | Ground | GND | ||
| BoosterPack positions 21-40 | ||||
| 21 | Power | 5V | ||
| 22 | Ground | GND | ||
| 23 | ADC | ADC1.6 | ||
| 24 | ADC | ADC0.7 | ||
| 25 | ADC | ADC1.5 | ||
| 26 | ADC | ADC1.3 / BOOT button | ||
| 27 | ADC | ADC0.3 | ||
| 28 | ADC | ADC1.2 | ||
| 29 | ADC | J15 select | ||
| 30 | DAC | DAC OUT | ||
| 31 | Alt | CAN | CAN RX | |
| 32 | Alt | CAN | CAN TX | |
| 33 | UART | UART | LIN RX | |
| 34 | UART | UART | LIN TX | |
| 35 | PWM | |||
| 36 | PWM | |||
| 37 | PWM | |||
| 38 | PWM | |||
| 39 | PWM | |||
| 40 | PWM | |||
Why it matters
- Official TI tool page links design files, user's guide, and schematics.
- BoosterPack headers expose common embedded interfaces.
- Good entry board for TI's newer MSPM0 family.
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