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FPGA · Development Board
Lattice MachXO2 Breakout Board
A low-cost breakout board for the MachXO2-7000HE FPGA in a 144-pin TQFP package. Four unpopulated 2x20 header landings expose 108 FPGA I/Os plus bank power, core power, ground, and configuration signals. The device provides embedded Flash for instant-on operation, two PLLs, 256 kbits of embedded RAM, and hardened I2C/SPI blocks.
Processor
Lattice LCMXO2-7000HE-4TG144C (144-pin TQFP, 6,864 LUTs, instant-on NV Flash)
Logic
3.3 V VCCIO defaults on all banks (1.2 V core)
Power
USB mini-B (5 V); onboard regulator provides 3.3 V and 1.2 V
Format
3" × 3" PCB with four 2x20 100-mil expansion header landings
Check before wiring
- The pinout is for the LCMXO2-7000HE-4TG144C population; EB68 also documents an older -1200ZE population with different signal names.
- The board ties VCCIO0-5 to 3.3 V by default. Do not connect lower-voltage external logic without checking the board power configuration and I/O standard.
- DONE, INITn, PROGn, JTAGEN, JTAG, and SPI configuration functions share expansion pins; avoid driving them incompatibly during configuration.
- The embedded User Flash Memory (UFM) and boot Flash share the same NV memory array; take care not to overwrite configuration when writing UFM.
Interfaces
GPIOSPII2CUARTJTAGUSB
Source-backed connector
Interactive pin map
Pin map
Connector
J2, J3, J4, and J5 2x20 expansion header landings
Signals grouped by function — schematic layout, not to physical scale
Dense header — open Full view for a roomier, fully-labelled diagram.
Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.
Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.
- Physical header positions and TQ144 package pins are from EB68 Tables 3-6 for the LCMXO2-7000HE board population.
- J2 pins 3/4/13/14/25/26/29/30 are shared with DONE, INITn, PROGn, JTAGEN, TMS, TCK, TDI, and TDO respectively.
- J4 pins 5-8 expose the left general-PLL feedback/input pads (L_GPLLT_FB, L_GPLLC_FB, L_GPLLT_IN, L_GPLLC_IN); EB68 prints the second as the transposed L_GPPLC_FB.
- J5 pins 3/5/31/33/39 are shared with SISPI, SN, SPISO, CCLK, and CSSPIN configuration functions.
- The headers are unpopulated 100 mil landings; connector numbering must be read from the EB68 callout drawings before soldering.
All 160 pins (table)
| # | Signal | Role | Net | Also / notes |
|---|---|---|---|---|
| J2 - Bank 0 | ||||
| 1 | Reserved | |||
| 2 | Power | VCCIO0(TQ144PINS118,123,135) | ||
| 3 | Alt | |||
| 4 | Alt | |||
| 5 | GPIO | |||
| 6 | GPIO | |||
| 7 | Ground | GND | ||
| 8 | Ground | GND | ||
| 9 | GPIO | |||
| 10 | GPIO | |||
| 11 | GPIO | |||
| 12 | GPIO | |||
| 13 | Alt | |||
| 14 | Alt | |||
| 15 | Ground | GND | ||
| 16 | Ground | GND | ||
| 17 | GPIO | |||
| 18 | GPIO | |||
| 19 | GPIO | I2C | ||
| 20 | GPIO | I2C | ||
| 21 | GPIO | |||
| 22 | GPIO | |||
| 23 | Ground | GND | ||
| 24 | Ground | GND | ||
| 25 | Alt | |||
| 26 | Alt | |||
| 27 | GPIO | |||
| 28 | GPIO | |||
| 29 | Alt | |||
| 30 | Alt | |||
| 31 | Ground | GND | ||
| 32 | Ground | GND | ||
| 33 | GPIO | |||
| 34 | GPIO | |||
| 35 | GPIO | |||
| 36 | GPIO | |||
| 37 | GPIO | |||
| 38 | GPIO | |||
| 39 | Ground | GND | ||
| 40 | Ground | GND | ||
| J3 - Bank 1 | ||||
| 1 | Power | 1.2VCORE(TQ144PINS36,72,108,144) | ||
| 2 | Power | VCCIO1(TQ144PINS79,88,102) | ||
| 3 | Power | 1.2VCORE(TQ144PINS36,72,108,144) | ||
| 4 | Reserved | |||
| 5 | GPIO | |||
| 6 | GPIO | |||
| 7 | GPIO | |||
| 8 | GPIO | |||
| 9 | Ground | GND | ||
| 10 | Ground | GND | ||
| 11 | GPIO | |||
| 12 | GPIO | |||
| 13 | GPIO | |||
| 14 | GPIO | |||
| 15 | Ground | GND | ||
| 16 | Ground | GND | ||
| 17 | GPIO | |||
| 18 | GPIO | |||
| 19 | GPIO | |||
| 20 | GPIO | |||
| 21 | Ground | GND | ||
| 22 | Ground | GND | ||
| 23 | GPIO | |||
| 24 | GPIO | |||
| 25 | GPIO | |||
| 26 | GPIO | |||
| 27 | Ground | GND | ||
| 28 | Ground | GND | ||
| 29 | GPIO | |||
| 30 | GPIO | |||
| 31 | GPIO | |||
| 32 | GPIO | |||
| 33 | Ground | GND | ||
| 34 | Ground | GND | ||
| 35 | GPIO | |||
| 36 | GPIO | |||
| 37 | GPIO | |||
| 38 | GPIO | |||
| 39 | GPIO | |||
| 40 | GPIO | |||
| J4 - Banks 3/4/5 | ||||
| 1 | Power | 3V3 | ||
| 2 | Power | VCCIO3/4/5(TQ144PINS30,16,7) | ||
| 3 | Power | 3V3 | ||
| 4 | Reserved | |||
| 5 | GPIO | |||
| 6 | GPIO | |||
| 7 | GPIO | |||
| 8 | GPIO | |||
| 9 | GPIO | |||
| 10 | GPIO | |||
| 11 | GPIO | |||
| 12 | GPIO | |||
| 13 | Ground | GND | ||
| 14 | Ground | GND | ||
| 15 | GPIO | |||
| 16 | GPIO | |||
| 17 | GPIO | |||
| 18 | GPIO | |||
| 19 | Ground | GND | ||
| 20 | Ground | GND | ||
| 21 | GPIO | |||
| 22 | GPIO | |||
| 23 | GPIO | |||
| 24 | GPIO | |||
| 25 | Ground | GND | ||
| 26 | Ground | GND | ||
| 27 | GPIO | |||
| 28 | GPIO | |||
| 29 | GPIO | |||
| 30 | GPIO | |||
| 31 | Ground | GND | ||
| 32 | Ground | GND | ||
| 33 | GPIO | |||
| 34 | GPIO | |||
| 35 | Ground | GND | ||
| 36 | Ground | GND | ||
| 37 | GPIO | |||
| 38 | GPIO | |||
| 39 | GPIO | |||
| 40 | GPIO | |||
| J5 - Bank 2 | ||||
| 1 | Reserved | |||
| 2 | Power | VCCIO2(TQ144PINS37,51,66) | ||
| 3 | Alt | |||
| 4 | GPIO | |||
| 5 | Alt | |||
| 6 | GPIO | |||
| 7 | GPIO | |||
| 8 | GPIO | |||
| 9 | GPIO | |||
| 10 | GPIO | |||
| 11 | Ground | GND | ||
| 12 | Ground | GND | ||
| 13 | GPIO | |||
| 14 | GPIO | |||
| 15 | GPIO | |||
| 16 | GPIO | |||
| 17 | Ground | GND | ||
| 18 | Ground | GND | ||
| 19 | GPIO | |||
| 20 | GPIO | |||
| 21 | GPIO | |||
| 22 | GPIO | |||
| 23 | Ground | GND | ||
| 24 | Ground | GND | ||
| 25 | GPIO | |||
| 26 | GPIO | |||
| 27 | GPIO | |||
| 28 | GPIO | |||
| 29 | Ground | GND | ||
| 30 | Ground | GND | ||
| 31 | Alt | |||
| 32 | GPIO | |||
| 33 | Alt | |||
| 34 | GPIO | |||
| 35 | Ground | GND | ||
| 36 | Ground | GND | ||
| 37 | GPIO | |||
| 38 | GPIO | |||
| 39 | Alt | |||
| 40 | GPIO | |||
Why it matters
- LCMXO2-7000HE: 6,864 LUTs, embedded NV Flash (no external config device needed), instant-on.
- 108 I/Os from the 144-pin TQFP are accessible through four 100-mil expansion header landings.
- Hardened I2C, SPI, timer/counter blocks, and 256 kbits embedded SRAM in fabric.
- USB mini-B provides both power and JTAG programming via onboard FT2232HL USB bridge.
- Small 3" × 3" form factor; LED array and prototype area included.
- Supported by Lattice Diamond and Diamond Programmer.
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