Teensy 3.2

PJRC · Teensy

Filter pins

Showing 43 of 43 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Functional grouping from PJRC's Teensy 3.2 pinout card and product-page pin descriptions.
Digital pins are 3.3 V outputs and 5 V tolerant inputs; analog-only pins A10-A14 are not 5 V tolerant.
A14 is the true DAC output; AREF defaults to 3.3 V through a resistor.
Pins 24-33 and some analog pads are underside-only and are harder to access on solderless breadboards.

Full pin list, synchronized with the board drawing.
#	Role	Net	Also / notes
Power / control
1	Power	VIN	3.6-6.0 V input.
2	Power	3V3	Regulated 3.3 V output, 250 mA max.
3	Ground	GND
4	Power	VBAT	RTC coin-cell input.
5	System
6	Power	AREF
Breadboard edge pins
1	UART	UART1	RX1
2	UART	UART1	TX1
3	GPIO
4	PWM
5	PWM
6	PWM
7	PWM
8	UART	UART3	RX3
9	UART	UART3	TX3
10	UART	UART2	RX2
11	UART	UART2	TX2 / CS
12	SPI	SPI	DOUT / MOSI
13	SPI	SPI	DIN / MISO
14	SPI	SPI	SCK / LED
15	ADC
16	ADC
17	ADC
18	ADC
19	I2C	I2C0	SDA0
20	I2C	I2C0	SCL0
21	ADC
22	ADC
23	ADC
24	ADC
Underside / extra pads
24	ADC		Analog-only; not 5 V tolerant.
25	ADC		Analog-only; not 5 V tolerant.
26	ADC		Analog-only; not 5 V tolerant.
27	ADC		Analog-only; not 5 V tolerant.
28	GPIO
29	UART	UART2	RX2
30	UART	UART2	TX2
31	ADC
32	ADC	I2C1	SCL1
33	ADC	I2C1	SDA1
34	DAC		True analog output.
Buses
35	Alt	CAN	Pins 3/4 alternate function
36	Alt		0-1, 15-19, 22-23, 25, 32-33

Loading source-backed pinouts…

PJRC · Teensy

Filter pins

Showing 43 of 43 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Functional grouping from PJRC's Teensy 3.2 pinout card and product-page pin descriptions.
Digital pins are 3.3 V outputs and 5 V tolerant inputs; analog-only pins A10-A14 are not 5 V tolerant.
A14 is the true DAC output; AREF defaults to 3.3 V through a resistor.
Pins 24-33 and some analog pads are underside-only and are harder to access on solderless breadboards.

Full pin list, synchronized with the board drawing.
#	Role	Net	Also / notes
Power / control
1	Power	VIN	3.6-6.0 V input.
2	Power	3V3	Regulated 3.3 V output, 250 mA max.
3	Ground	GND
4	Power	VBAT	RTC coin-cell input.
5	System
6	Power	AREF
Breadboard edge pins
1	UART	UART1	RX1
2	UART	UART1	TX1
3	GPIO
4	PWM
5	PWM
6	PWM
7	PWM
8	UART	UART3	RX3
9	UART	UART3	TX3
10	UART	UART2	RX2
11	UART	UART2	TX2 / CS
12	SPI	SPI	DOUT / MOSI
13	SPI	SPI	DIN / MISO
14	SPI	SPI	SCK / LED
15	ADC
16	ADC
17	ADC
18	ADC
19	I2C	I2C0	SDA0
20	I2C	I2C0	SCL0
21	ADC
22	ADC
23	ADC
24	ADC
Underside / extra pads
24	ADC		Analog-only; not 5 V tolerant.
25	ADC		Analog-only; not 5 V tolerant.
26	ADC		Analog-only; not 5 V tolerant.
27	ADC		Analog-only; not 5 V tolerant.
28	GPIO
29	UART	UART2	RX2
30	UART	UART2	TX2
31	ADC
32	ADC	I2C1	SCL1
33	ADC	I2C1	SDA1
34	DAC		True analog output.
Buses
35	Alt	CAN	Pins 3/4 alternate function
36	Alt		0-1, 15-19, 22-23, 25, 32-33