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Board overview
STM32 Nucleo-H753ZI
STMicroelectronics · STM32 Nucleo-144
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Simplified technical illustration. Pin data is source-backed; verify against the linked documentation before wiring.
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Mapped source · ST NUCLEO-H753ZI product pageOfficial- Zio tables follow ST UM2407 Rev 4 for the MB1364 board (NUCLEO-H723ZG / H743ZI2 / H753ZI).
- A0-A5 and D0-D15 are the Arduino Uno V3 subset; A6-A8 and D16-D72 are the Zio extension.
- Every MCU pin also fans out to the ST morpho headers CN11/CN12 (UM2407 Table 22).
- The Ethernet PHY claims PA1, PA2, PC1, PC4, PC5, PG11, PG13, PA7, and PB13 through default-ON solder bridges.
All 100 pins
| # | Signal | Role | Net | Also / notes |
|---|---|---|---|---|
| CN7 Zio (upper right) | ||||
| 1 | Alt | I2S2 | I2S2 MCK / I2S_A_MCK | |
| 2 | I2C | I2C1 | I2C1 SCL / I2C_A_SCL | |
| 3 | Alt | I2S2 | I2S2 SD / I2S_A_SD | |
| 4 | I2C | I2C1 | I2C1 SDA / I2C_A_SDA | |
| 5 | Alt | I2S2 | I2S2 CK / I2S_A_CK · JP6 ON routes PB13 to the Ethernet PHY as RMII_TXD1 — Ethernet and I2S_A cannot be used together. | |
| 6 | Power | VREF+ | VDDA · Remove R37 before letting a shield drive VREF+ (UM2407). | |
| 7 | Alt | I2S2 | I2S2 WS / I2S_A_WS | |
| 8 | Ground | GND | ||
| 9 | Alt | I2S3 | I2S3 WS / I2S_B_WS | |
| 10 | SPI | SPI1 | SPI1 SCK / SPI_A_SCK · PA5 is also DAC1_OUT2. | |
| 11 | Alt | I2S3 | I2S3 MCK / I2S_B_MCK | |
| 12 | SPI | SPI1 | SPI1 MISO / SPI_A_MISO | |
| 13 | SPI | SPI3 | SPI3 MOSI / I2S_B_SD · Shares PB5 with D11 (CN7 pin 14); use only one at a time. | |
| 14 | SPI | SPI1 | SPI1 MOSI / TIM3 CH2 / TIM_E_PWM1 · Shares PB5 with D22. SB31 can route PA7 here instead, but PA7 is the Ethernet RMII_CRS_DV signal. | |
| 15 | SPI | SPI3 | SPI3 SCK / I2S_B_CK | |
| 16 | SPI | SPI1 | SPI1 CS / TIM4 CH3 / TIM_B_PWM3 | |
| 17 | SPI | SPI3 | SPI3 NSS / SPI_B_NSS · PA4 is also DAC1_OUT1. | |
| 18 | PWM | TIM4 CH4 / TIM_B_PWM2 | ||
| 19 | SPI | SPI3 | SPI3 MISO / SPI_B_MISO | |
| 20 | GPIO | |||
| CN8 Zio (upper left) | ||||
| 1 | Reserved | |||
| 2 | Alt | SDMMC_D0 | ||
| 3 | Power | IOREF | 3.3 V reference for shields. | |
| 4 | Alt | SDMMC_D1 / I2S_CKIN | ||
| 5 | System | |||
| 6 | Alt | SDMMC_D2 | ||
| 7 | Power | 3V3 | ||
| 8 | Alt | SDMMC_D3 | ||
| 9 | Power | 5V | ||
| 10 | Alt | SDMMC_CK | ||
| 11 | Ground | GND | ||
| 12 | Alt | SDMMC_CMD | ||
| 13 | Ground | GND | ||
| 14 | GPIO | |||
| 15 | Power | VIN | 7-12 V external input. | |
| 16 | GPIO | |||
| CN9 Zio (lower left) | ||||
| 1 | ADC | ADC12_INP15 | ||
| 2 | UART | UART2 | USART2 SCLK / USART_B_SCLK | |
| 3 | ADC | ADC123_INP10 | ||
| 4 | UART | UART2 | USART2 RX / USART_B_RX | |
| 5 | ADC | ADC12_INP13 | ||
| 6 | UART | UART2 | USART2 TX / USART_B_TX | |
| 7 | ADC | ADC12_INP5 | ||
| 8 | UART | UART2 | USART2 RTS / USART_B_RTS | |
| 9 | ADC | ADC123_INP12 · SB53 ON by default; SB55 reroutes A4 to PB9 (I2C1_SDA) for Arduino shields. | ||
| 10 | UART | UART2 | USART2 CTS / USART_B_CTS | |
| 11 | ADC | ADC3_INP6 · SB60 ON by default; SB62 reroutes A5 to PB8 (I2C1_SCL) for Arduino shields. | ||
| 12 | Ground | GND | ||
| 13 | Alt | COMP1_INP · PB2 is also QSPI_CLK (D27) on CN10 pin 15. | ||
| 14 | Alt | SAI1 A MCLK / SAI_A_MCLK · PE2 is shared with QSPI_BK1_IO2 (D31) on CN10 pin 25; use only one. | ||
| 15 | Alt | COMP2_INP · PE9 is also TIM1_CH1 (D6) on CN10 pin 4. | ||
| 16 | Alt | SAI1 A FS / SAI_A_FS | ||
| 17 | I2C | I2C2 | I2C2 SMBA / I2C_B_SMBA | |
| 18 | Alt | SAI1 A SCK / SAI_A_SCK | ||
| 19 | I2C | I2C2 | I2C2 SCL / I2C_B_SCL | |
| 20 | Alt | SAI1 A SD / SAI_A_SD · PE6 is also TIM1_BKIN2 (D38) on CN10 pin 28. | ||
| 21 | I2C | I2C2 | I2C2 SDA / I2C_B_SDA | |
| 22 | Alt | SAI1 B SD / SAI_B_SD | ||
| 23 | Ground | GND | ||
| 24 | Alt | SAI1 B SCK / SAI_B_SCK | ||
| 25 | Alt | CAN1 | CAN1 RX / FDCAN1 RX | |
| 26 | Alt | SAI1 B MCLK / SAI_B_MCLK | ||
| 27 | Alt | CAN1 | CAN1 TX / FDCAN1 TX | |
| 28 | Alt | SAI1 B FS / SAI_B_FS | ||
| 29 | GPIO | |||
| 30 | GPIO | |||
| CN10 Zio (lower right) | ||||
| 1 | Power | AVDD | Analog supply rail. | |
| 2 | GPIO | |||
| 3 | Ground | AGND | ||
| 4 | PWM | TIM1 CH1 / TIMER_A_PWM1 · PE9 is also COMP2_INP (D71) on CN9 pin 15. | ||
| 5 | Ground | GND | ||
| 6 | PWM | TIM1 CH2 / TIMER_A_PWM2 | ||
| 7 | ADC | ADC3_INP9 | ||
| 8 | GPIO | |||
| 9 | ADC | ADC3_INP4 | ||
| 10 | PWM | TIM1 CH3 / TIMER_A_PWM3 | ||
| 11 | ADC | ADC3_INP8 | ||
| 12 | GPIO | |||
| 13 | SPI | QSPI1 | QSPI1 NCS / QSPI_CS | |
| 14 | UART | UART | LPUART1 TX / USART_A_TX | |
| 15 | SPI | QSPI1 | QSPI1 CLK / QSPI_CLK · PB2 is also COMP1_INP (D72) on CN9 pin 13. | |
| 16 | UART | UART | LPUART1 RX / USART_A_RX | |
| 17 | Ground | GND | ||
| 18 | PWM | TIM1 CH1N / TIMER_A_PWM1N | ||
| 19 | SPI | QSPI1 | QSPI1 IO3 / QSPI_BK1_IO3 | |
| 20 | Alt | TIM1 ETR / TIMER_A_ETR | ||
| 21 | SPI | QSPI1 | QSPI1 IO1 / QSPI_BK1_IO1 | |
| 22 | Ground | GND | ||
| 23 | SPI | QSPI1 | QSPI1 IO0 / QSPI_BK1_IO0 | |
| 24 | PWM | TIM1 CH2N / TIMER_A_PWM2N | ||
| 25 | SPI | QSPI1 | QSPI1 IO2 / QSPI_BK1_IO2 · PE2 is shared with SAI_A_MCLK (D56) on CN9 pin 14; use only one. | |
| 26 | PWM | TIM1 CH3N / TIMER_A_PWM3N | ||
| 27 | Ground | GND | ||
| 28 | Alt | TIM1 BKIN2 / TIMER_A_BKIN2 · PE6 is also SAI_A_SD (D59) on CN9 pin 20. | ||
| 29 | PWM | TIM2 CH1 / TIM_C_PWM1 | ||
| 30 | Alt | TIM1 BKIN1 / TIMER_A_BKIN1 | ||
| 31 | PWM | TIM3 CH3 / TIM_D_PWM1 | ||
| 32 | PWM | TIM2 CH3 / TIMER_C_PWM2 | ||
| 33 | Alt | TIM4 ETR / TIM_B_ETR | ||
| 34 | PWM | TIM2 CH4 / TIMER_C_PWM3 | ||