LOLIN S2 Mini

LOLIN · S2

Filter pins

Showing 26 of 26 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Outer rows are D1 Mini-footprint compatible; inner rows expose additional ESP32-S2 GPIOs.
GPIO0 is the boot-strap / BOOT button pin — LOW at reset enters download mode.
No Bluetooth on ESP32-S2; native USB-OTG on GPIO19/20 requires CDC enabled in firmware.
ADC2 (GPIO11–GPIO17) conflicts with Wi-Fi — use ADC1 (GPIO1–GPIO10) for reliable reads.
GPIO is 3.3 V only.

Full pin list, synchronized with the board drawing.
#	Role	Net	Also / notes
Left outer row
1	System
2	Power	3V3
3	SPI	SPI2	SPI2 CLK / D5 compat
4	SPI	SPI2	SPI2 MISO / D6 compat
5	SPI	SPI2	SPI2 MOSI / D7 compat
6	Alt		SPI2 CS / D8 compat; check boot strapping.
7	GPIO
8	GPIO
Right outer row
9	UART	UART0	UART0 TX
10	UART	UART0	UART0 RX
11	I2C	I2C	I2C SDA / D2 compat
12	I2C	I2C	I2C SCL / D1 compat
13	GPIO
14	GPIO
15	Ground	GND
16	Power	5V
Left inner row
17	Power	5V
18	ADC		ADC2 — avoid when Wi-Fi active.
19	ADC		ADC2 — avoid when Wi-Fi active.
20	ADC		ADC2 — avoid when Wi-Fi active.
21	GPIO
Right inner row
22	SPI	SPI3	SPI3 MOSI
23	SPI	SPI3	SPI3 MISO
24	SPI	SPI3	SPI3 CLK
25	GPIO
26	GPIO

Loading source-backed pinouts…

LOLIN · S2

Filter pins

Showing 26 of 26 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Outer rows are D1 Mini-footprint compatible; inner rows expose additional ESP32-S2 GPIOs.
GPIO0 is the boot-strap / BOOT button pin — LOW at reset enters download mode.
No Bluetooth on ESP32-S2; native USB-OTG on GPIO19/20 requires CDC enabled in firmware.
ADC2 (GPIO11–GPIO17) conflicts with Wi-Fi — use ADC1 (GPIO1–GPIO10) for reliable reads.
GPIO is 3.3 V only.

Full pin list, synchronized with the board drawing.
#	Role	Net	Also / notes
Left outer row
1	System
2	Power	3V3
3	SPI	SPI2	SPI2 CLK / D5 compat
4	SPI	SPI2	SPI2 MISO / D6 compat
5	SPI	SPI2	SPI2 MOSI / D7 compat
6	Alt		SPI2 CS / D8 compat; check boot strapping.
7	GPIO
8	GPIO
Right outer row
9	UART	UART0	UART0 TX
10	UART	UART0	UART0 RX
11	I2C	I2C	I2C SDA / D2 compat
12	I2C	I2C	I2C SCL / D1 compat
13	GPIO
14	GPIO
15	Ground	GND
16	Power	5V
Left inner row
17	Power	5V
18	ADC		ADC2 — avoid when Wi-Fi active.
19	ADC		ADC2 — avoid when Wi-Fi active.
20	ADC		ADC2 — avoid when Wi-Fi active.
21	GPIO
Right inner row
22	SPI	SPI3	SPI3 MOSI
23	SPI	SPI3	SPI3 MISO
24	SPI	SPI3	SPI3 CLK
25	GPIO
26	GPIO