Lattice CrossLink-NX Evaluation Board

Lattice Semiconductor · CrossLink-NX

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Showing 36 of 36 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Pmod I/O signal names and LIFCL-40 caBGA balls are from FPGA-EB-02028 Table 8.6; each header is a 2x6 Digilent Pmod exposing eight FPGA I/O.
Per the Digilent Pmod 1.2.0 standard, positions 5/11 are GND and 6/12 are 3.3 V; only the eight signal positions are device-connected.
These Pmod banks are the board's general-purpose breakout. Camera, D-PHY, and MIPI interfaces run at 1.2-1.8 V and are not interchangeable with 3.3 V Pmod accessories.
The board needs its 12 V supply for PCIe and full-power operation; USB-B alone powers only the programming path.

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Lattice Semiconductor · CrossLink-NX

Filter pins

Showing 36 of 36 pins

Simplified diagram, grouped by function — not to physical scale. Pin data is source-backed; verify against the linked documentation.

Hover, tap, or focus a pad to inspect a pin. Use arrow keys to move between pins.

Pmod I/O signal names and LIFCL-40 caBGA balls are from FPGA-EB-02028 Table 8.6; each header is a 2x6 Digilent Pmod exposing eight FPGA I/O.
Per the Digilent Pmod 1.2.0 standard, positions 5/11 are GND and 6/12 are 3.3 V; only the eight signal positions are device-connected.
These Pmod banks are the board's general-purpose breakout. Camera, D-PHY, and MIPI interfaces run at 1.2-1.8 V and are not interchangeable with 3.3 V Pmod accessories.
The board needs its 12 V supply for PCIe and full-power operation; USB-B alone powers only the programming path.